Teilzeit | befristet | Praktikum
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Ihr Wirkungsbereich
- Eigenverantwortliche Leitung, Konzeption und Durchführung von Lehrveranstaltungen und Studienmodulen (teilweise in englischer Sprache) mit Auf- und Ausbau der Schwerpunkte Elektronik und Leistungselektronik
- Begleitung von Studierenden
- Eigenverantwortliche Initiierung, Akquisition und Umsetzung von Forschungsprojekten sowie Mitarbeit in laufenden Forschungsaktivitäten
- Mitwirkung an der Weiter-/Entwicklung der Studien- und Weiterbildungsangebote des Studienbereichs
- Organisatorische & administrative Tätigkeiten im Rahmen der akademischen Selbstverwaltung des Studienbereichs
- Vertretung der Hochschule als Fachexpert*in in regionalen und internationalen Partnerschaften und in Kooperationen mit der öffentlichen Verwaltung, der Wirtschaft und der wissenschaftlichen Community
- Vermittlung wissenschaftlich fundierter Kenntnisse mit hohem Praxisbezug
- Betreuung von Abschlussarbeiten (Bachelor- und Masterarbeiten)
- Bereitschaft zur Mitarbeit an internationalen Aktivitäten der CU, insbesondere im Rahmen der European
University „ACE²-EU“
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Senior Scientist - Ion-trap chips (all genders)
- Establishment of infrastructure and set-ups for testing and operation of ion trap devices and development of ion trap systems for Quantum technology applications.
- Coordination and alignment of internal efforts and activities with industrial and academic partners in the pilot line.
- Contribution to design, simulation and characterization of new ion trap chips.
- Dissemination, communication and reporting of research findings to both scientific and non-scientific audiences.
- Supervision of students.
- Activities in relevant networks.
- Project management.
- Project and funding acquisition.
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Plasma R&D Process Engineering - Dry Etch / PECVD (all genders)
- Develop, optimize, and sustain plasma etch (dry etch) & deposition (PECVD) processes to support diverse R&D flows.
- Establish stable, repeatable process baselines and maintain tight control through SPC and regular performance monitoring.
- Own and maintain plasma tools, ensuring high uptime and process consistency.
- Define and document process parameters, recipes, and best practices to ensure reproducibility across experiments and flows.
- Collaborate with the process engineering team members to ensure process compatibility across the full fabrication flow.
- Lead troubleshooting, root cause analysis and continuous improvement activities to maintain high process quality and tool uptime.
- Support tool upgrades, new equipment acquisition, and capability expansion projects.
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Semiconductor Equipment Engineer (all genders)
- Independently carrying out maintenance, troubleshooting, and servicing of high-end cleanroom equipment
- Planning and coordinating preventive and corrective maintenance activities on semiconductor tools
- Supporting the continuous improvement of maintenance processes and equipment reliability within the cleanroom environment
- Performing regular inspections of cleanroom facilities and infrastructure
- Assisting the cleanroom team with daily operational and technical tasks
- Preparing and maintaining technical documentation, maintenance records, and operating procedures
- Working closely with equipment suppliers and process engineers to improve tool performance and support advanced process development
- Coordinating service activities with external vendors as well as internal stakeholders
- Supporting organizational and administrative activities within the team to ensure smooth day-to-day operations
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R&D Process Engineer - Stepper-based Lithography (all genders)
- Develop, optimize, and maintain stepper-based lithography processes for a diverse multi-project R&D environment.
- Establish repeatable process baselines and maintain control through SPC and routine performance monitoring.
- Define and document process parameters, recipes, and SOPs to support repeatable user operation.
- Own stepper tool and periphery equipment, ensuring high uptime and consistent performance for multiple technologies and flows.
- Work closely with process engineers and users to ensure lithography compatibility across varied fabrication flows.
- Work closely with equipment maintenance engineers to ensure tool health.
- Lead hands-on troubleshooting, root cause analysis, and continuous improvement in a fast-changing R&D setting.
- Support tool upgrades, new installations, and capability expansion projects.
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R&D Process Engineer - Thin Film Deposition (all genders)
- Develop, monitor, and optimize thin film deposition processes (primarily sputtering) to support R&D and prototype fabrication.
- Maintain tool health and stability through performance tracking, SPC monitoring, and preventive maintenance coordination.
- Support researcher use of deposition tools, ensuring safe operation, consistent process quality, and compliance with FAB standards.
- Lead and assist in tool upgrades, process capability improvements, and new equipment evaluation or acquisition.
- Document process parameters, tool performance, and experiment outcomes to ensure traceability and knowledge sharing.
- Serve as the technical interface between the fabrication team and research groups to enable efficient process development and experimentation.
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Pilot Line PDK & Design Enablement Lead (all genders)
- PDK strategy & roadmap: define and maintain a consolidated PDK roadmap (priorities, maturity targets, releases) aligned with platform and fabrication evolution.
- PDK governance & release management: establish a structured release process (versioning, release notes, change control, qualification evidence, deprecation rules) and ensure predictable delivery for users.
- Design-to-fab interface: act as the interface between designers and fabrication teams to align layer definitions, design rules, tolerances, process assumptions, sign-off criteria, and handover packages.
- PDK content quality: own quality of PDK deliverables such as DRC/LVS/PEX flows (as applicable), models, corners/variability knobs, examples, and user documentation.
- Validation & calibration: coordinate validation and calibration plans with measurement/metrology and process teams; ensure model updates are evidence-based and traceable to wafer data.
- EDA and enablement flows: maintain compatibility with relevant EDA toolchains; provide reference flows, templates, and automation where beneficial (build/release tooling, regression checks).
- User support & enablement: support internal teams and selected external open-access users (onboarding, requirements clarification, feedback capture) and translate user needs into backlog items.
- Documentation & know-how management: ensure strong documentation discipline and coordinate what can be shared externally vs what must be protected, in collaboration with responsible functions.
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Pilot Line PDK & Design Enablement Lead (all genders)
- Cross-platform process integration: maintain an end-to-end overview of process flows and module interfaces (e.g., thin films, lithography, etch, metrology closure) across integrated photonics, MEMS and related technology stacks.
- Baseline flows & readiness: define and maintain reference flows versus development lanes; support readiness reviews and ensure clear release criteria for stable execution.
- Process change control & documentation discipline: ensure recipe/version control, run cards, parameter windows, and structured documentation of decisions and learnings.
- Know-how capture: support structured capture of process know-how and clarify what can be shared externally vs protected, in collaboration with responsible functions.
- Traceability / data backbone: ensure wafer genealogy, run history, recipe versions, and measurement linkage are consistently captured to build a scalable single source of truth.
- Coordination interface: act as the key technical coordination contact with SAL MicroFab to align run readiness, documentation requirements, execution constraints, and release criteria (without owning MicroFab operations).
- Stability & continuous improvement: drive variability reduction and improvement loops (metrology closure, deviation handling, root-cause analysis) and feed improvements back into baseline flows and documentation.
- External request (open access): support business development and pilot-line teams by translating external requests into executable technical scopes (capability check, feasibility, assumptions/risks, measurement package, deliverables) and matching requests to the right platform capability.
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Senior Research Engineer – Nitride Thin-Film Materials (Wide Band Gap) (all genders)
- Development of thin films for piezoelectric and wide-band-gap applications.
- Design and execute experiments to optimize nitride thin film materials, guided by device specifications and performance feedback.
- Structural and functional (e.g. dielectric, electrical, ferroelectric) characterization of the deposited thin films.
- Collaboration with design, fabrication, characterization, and process engineer teams to optimize full process flow and device performance.
- Definition of strategies for material optimization and pursuing scientifically relevant investigations.
- Development of strategies to address novel material properties and novel fields of application.
- Contributing to the standardization of procedures and workflows within the Unit.
- Filing IP disclosures whenever possible and appropriate.
- Contribution to scientific dissemination (publications in high-impact peer-reviewed journals, presentations at conferences).
- Contribution to Unit workflows, project acquisition and project management.
- Position is offered within the Chips JU Pilot Lines.
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Vollzeit | Teilzeit | befristet | Praktikum
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Vollzeit | Teilzeit | Praktikum
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