At a glance
- Work in the R&D mixed-signal IC design organization
- Support R&D chip designers for daily issues related to mixed-signal IC development flow and related EDA software tools and methodology (1stlevel support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these in design projects
- Share knowledge within the (IFX world-wide) “Design Application Engineering Community
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At a glance
- Work in the R&D mixed-signal IP design organization
- Support R&D chip designers for daily issues related to mixed-signal IP development flow and related EDA software tools and methodology (1st level support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive
- usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these indesign projects
- Share knowledge within the (IFX world-wide) "Design Application Engineering Community"
|
At a glance
- Work in the R&D mixed-signal IC design organization
- Support R&D chip designers for daily issues related to mixed-signal IC development flow and related EDA software tools and methodology (1st level support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these in design projects
- Share knowledge within the (IFX world-wide) “Design Application Engineering Community”
|
At a glance
- Create and maintain verification plans
- Choose the right verification methodology
- Define verification metrics and set-up verification environments
- Elaborate and execute tests on RTL and gate-level
- Team up and collaborate with colleagues from analog and digital design as well as concept engineering
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At a glance
- Do analog focused Mixed-Signal Verification
- Create and maintain verification plans
- Define verification metrics and set-up verification environments, including analog testbenches
- Elaborate and execute tests on analog transistor level (schematic + layout) with digital RTL and gatelevel
- Team up and collaborate with colleagues from analog and digital design and verification, as well as concept engineering
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At a glance
- End-to-End Digital Circuit Design & Verification
Lead the entire RTL design process, from block-level to top-level, ensuring robust logic synthesis, static timing analysis, and seamless integration across clock domains - Defining Architecture & Hardware Requirements
Translate product requirements into hardware specifications, working with system concept engineers to define optimal architectures and interfaces for digital modules - Technical Leadership & Team Management
Plan and execute digital design activities, oversee quality inspections, provide post-silicon bring-up support, and mentor a growing team of designers and students - DFT & Functional Safety Compliance
Lead design-for-test (DFT) efforts, including scan insertion and ATPG, while ensuring compliance with ATV ISO 26262 standards for functional safety - Collaborate with System, Verification & Chip Integration Teams
Work closely with cross-functional teams to define hardware architectures, review verification plans, and develop test cases that achieve high coverage - Pre-Silicon Verification & Quality Assurance
Analyze clock domain crossings (CDC) and linting, review pre-silicon verification plans, and ensure designs meet rigorous quality and testing standards
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