4 Cadence Jobs in Kärnten
At a glance
- Work closely with the Chip-Package-Board CoDesign team to design, implement, test, and maintain innovative software solutions that support semiconductor design processes
- Explore and apply AI/ML algorithms to enhance automation and efficiency in Electronic Design Automation (EDA) workflows and improve Chip-Package-Board CoDesign methodologies
- Develop software solutions using Python, Java, and Cadence SKILL within the EDA framework to support advanced semiconductor design challenges
- Analyze data from design workflows to identify optimization opportunities and implement data-driven solutions using AI/ML approaches
- Create tools that integrate AI/ML-based optimizations for resource-intensive processes such as simulation, design validation, and testing
- Participate in code reviews, maintain high-quality documentation, and develop test plans to ensure robust software solutions
- Acquire skills in "Cadence SKILL" programming and apply it towards developing efficient solutions for CoDesign challenges
- Stay updated with the latest trends in software development, AI/ML, and EDA technologies, actively contributing with new ideas to improve processes
|
At a glance
- EDA & Simulation Leadership: Own and advance our EDA toolchain (Ansys, Comsol, Cadence, etc.) and develop/refine innovative simulation methodologies.
- Methodology Guidance: Act as the primary technical expert for simulation methodologies, driving best practices and mentoring engineers in their application.
- Automation & AI Integration: Lead the charge in identifying and implementing automation and AI/ML opportunities within our EDA tools and design workflows.
- Cross-Team Collaboration: Partner with design, layout, and technology teams to ensure optimized and effective simulation solutions.
- Continuous Improvement: Stay ahead of industry trends in EDA, simulation, AI, and automation, bringing new capabilities into our design flow.
|
At a glance
- Develop and maintain physical verification components, ensuring they meet the highest standards of quality and performance
- Lead the implementation of Calibre DRC, ERC, LVS, and PERC Physical Verification runsets for our wafer technologies
- Collaborate with device development and modelling teams to ensure seamless integration of device verification, extraction, and quality assurance processes
- Implement and apply automated quality assurance checks to ensure the accuracy and reliability of our verification tools
- Create user documentation and provide support to the design community
- Align with internal stakeholders to identify and prioritize project requirements
|
Vollzeit | Teilzeit | Praktikum | Freelancer, Projektarbeit
Auf einen Blick
- Erlerntes in die Praxis umsetzen (in folgenden Themenfeldern möglich):
- Hardwarenahe Softwareentwicklung
- Analoges und digitales Chipdesign (z.B. VHDL, Verilog, Cadence)
- Signalverarbeitung
- Unterstützung internationaler Teams bei Infineon in Linz
|
