At a glance
- Work closely with the Chip-Package-Board CoDesign team to design, implement, test, and maintain innovative software solutions that support semiconductor design processes
- Explore and apply AI/ML algorithms to enhance automation and efficiency in Electronic Design Automation (EDA) workflows and improve Chip-Package-Board CoDesign methodologies
- Develop software solutions using Python, Java, and Cadence SKILL within the EDA framework to support advanced semiconductor design challenges
- Analyze data from design workflows to identify optimization opportunities and implement data-driven solutions using AI/ML approaches
- Create tools that integrate AI/ML-based optimizations for resource-intensive processes such as simulation, design validation, and testing
- Participate in code reviews, maintain high-quality documentation, and develop test plans to ensure robust software solutions
- Acquire skills in "Cadence SKILL" programming and apply it towards developing efficient solutions for CoDesign challenges
- Stay updated with the latest trends in software development, AI/ML, and EDA technologies, actively contributing with new ideas to improve processes
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At a glance
- EDA & Simulation Leadership: Own and advance our EDA toolchain (Ansys, Comsol, Cadence, etc.) and develop/refine innovative simulation methodologies.
- Methodology Guidance: Act as the primary technical expert for simulation methodologies, driving best practices and mentoring engineers in their application.
- Automation & AI Integration: Lead the charge in identifying and implementing automation and AI/ML opportunities within our EDA tools and design workflows.
- Cross-Team Collaboration: Partner with design, layout, and technology teams to ensure optimized and effective simulation solutions.
- Continuous Improvement: Stay ahead of industry trends in EDA, simulation, AI, and automation, bringing new capabilities into our design flow.
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Job profile and tasks
- Scientific Leadership: Lead and coordinate research groups in the development and implementation of highquality, cutting‐edge projects in relevant technologies and innovative approaches in biodiversity research.
- Representation: Represent activities of the UNESCO Chair and the I.C.E.B. internally and externally, building strong relationships with key partners, stakeholders, and funding bodies.
- Academic Teaching: Deliver academic teaching in programs such as the Bachelor’s in Green Transition Engineering, the Master’s in Management of Conservation Areas.
- Independent Research: Dedicate 50% of your time to developing and implementing your own research projects, aligned with the goals of the UNESCO Chair and the I.C.E.B.
- Strategic Development: Secure funding and grants to support research activities and contribute to the longterm strategic vision of adapting, developing and testing new technologies for research in biodiversity and ecosystem services.
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At a glance
- Define target product specifications of SiC JFET variants for hotswap, Oring, protection switch and circuit breaker applications
- Be the main technical interface to the development and go-to-market teams during the product development and post product launch stages respectively
- Develop application evaluation platforms for product validation and customer promotion
- Perform measurements based on fit for use plan to validate the suitability of SiC JFET based solutions in applications environment and document the relevant results
- Run performance benchmarking tests of internal and external products
- Prepare the product datasheets; develop product and application literature such as application notes, technical articles, promotion material, webinars etc.
- Provide global product support for the customer design-in projects
- Run simulations to replicate real application use scenarios and derive analyses
- Cascade customer feedback to internal development teams
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